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Publications Area

Publications from CONNECT research activity

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  1.  “Investigation of Electrical and Thermal Properties of Carbon Nanotube Interconnects”. A. Todri-Sanial. IEEE Power and Timing Modeling, Optimization and Simulation (PATMOS), Bremen, Germany, 2016.

  2.  “Physical description and analysis of doped carbon nanotube interconnects," J. Liang, L. Zhang, N. Azemard-Crestani, P. Nouet and A. Todri-Sanial, " in IEEE International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), Bremen, 2016, pp. 250-255. doi: 10.1109/PATMOS.2016.7833695

  3. “Present and future prospects of carbon nanotube interconnects for energy efficient integrated circuits”. Aida Todri-Sanial, Alessandro Magnani, Massimiliano de Magistris, Antonio Maffucci. 2016 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE).

  4. “Carbon Nanotubes for Interconnects”. Jie Liang, Aida Todri-Sanial. 2016 IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD). Nuremberg, Germany 2016.

  5. “Tools for Simulation Workflow Management and        their    Application to Interconnect Modelling”. S. M. Amoroso, A. Pender, A. Brown, D. Reid, E. Towie, P. Asenov, C. Millar and A. Asenov. 2016 IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD). Nuremberg, Germany 2016.

  6. “Status and Future of Advanced Interconnects and the Needs for Simulation”. Olivier Faynot, Severine Cheramy, Maud Vinet, Sylvain Maitrejean. 2016 IEEE International Conference on Simulation of Semiconductor Processes and Devices. SISPAD 2016. Nuremberg, Germanyhttps://dms-prext.fraunhofer.de/livelink/livelink.exe?func=ll&objaction=overview&objid=9982903

  7. “Local thermometry of self-heated nanoscale devices”. F. Menges, F. Motzfeld, H. Schmid, P. Mensch, M. Dittberner, S. Karg, H. Riel, B. Gotsmann. 2016 IEEE International Electron Devices Meeting (IEDM) – SF.

  8. “Atomistic to Circuit Level Modeling of Defective Doped SWCNTs with Contacts for On-Chip Interconnect Application”. J. Liang, J. Lee, S. Berrada, V. Georgiev, A. Asenov, N. Azemard-Crestani, A. Todri-Sanial. 12th IEEE Nanotechnology Materials and Devices Conference (NMDC).2017. 

  9. “Atoms-to-Circuits Simulation Investigation of CNT Interconnects for Next Generation CMOS Technologies”. J. Lee, J. Liang, S. M. Amoroso, T. Sadi, L. Wang, P. Asenov, A. Pender, D. Reid, V. P. Georgiev, C. Millar, A. Todri-Sanial, and A. Asenov. 22nd International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) 2017.

  10.  “A hierarchical model for CNT and Cu-CNT composite interconnects: from density functional theory to circuit-level simulations,” J. Lee, T. Sadi, J. Liang, V. P. Georgiev, A. Todri-Sanial, and A. Asenov,  in IEEE International Workshop on Computational Nanotechnology (IWCN) 2017.

  11. “The impact of vacancy defects on CNT interconnects: From statistical atomistic study to circuit simulations,”. J. Lee, S. Berrada, J.Liang, T. Sadi, V. Georgiev, A. Todri-Sanial, D. Kalita, R. Ramos, H.Okuno, J. Dijon, A. Asenov, in International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Kamakura, 2017, pp. 157-160.

  12. J. Liang, A. Todri-Sanial, “Power and Performance Analysis of Doped SW/DW CNT for On-Chip Interconnect Application”, in GRAPHENE 2017 International Conference. 

  13. “Variability Study of MWCNT Local Interconnects Considering Defects and Contact Resistances - Part I: Pristine MWCNT”. R. Chen J. Liang, J. Lee, V. P. Georgiev, R. Ramos, H. Okuno, D. Kalita, Y. Cheng, L. Zhang, R. R. Pandey, S. Amoroso, C. Millar A. Asenov, J, Dijon, A. Todri-Sanial, ”, accepted at IEEE Transactions on Electron Devices, 2018, doi: 10.1109/TED.2018.2868421.

  14. “Variability Study of MWCNT Local Interconnects Considering Defects and Contact Resistances - Part II: Impact of Charge Transfer Doping”,R. Chen J. Liang, J. Lee, V. P. Georgiev, R. Ramos, H. Okuno, D. Kalita, Y. Cheng, L. Zhang, R. R. Pandey, S. Amoroso, C. Millar A. Asenov, J, Dijon, A. Todri-Sanial, “, accepted at IEEE Transactions on Electron Devices, 2018, doi: 10.1109/TED.2018.2868424. 

  15. “Understanding Electromigration in Cu-CNT Composite Interconnects: A Multiscale Electro-Thermal Simulation Study,” J. Lee, S. Berrada, F. Adamu-Lema, H. Carrillo-Nunez, N. Nagy, V. Georgiev, T. Sadi, J. Liang, R. Ramos, D. Kalita, K. Lilienthal, M. Wislicenus, R. Pandey, B. Chen, K, Teo, G. Goncalves, H. Okuno, B. Uhlig, A. Todri-Sanial, J. Dijon, A. Asenov, IEEE Transactions on Electron Devices, 2018, doi: 10.1109/TED.2018.2853550. 

  16. “Atomistic- to Circuit-Level Modeling of Doped SWCNT for On-Chip Interconnects”. Jie Liang, Jaehyun Lee, Salim Berrada, Vihar P. Georgiev, Reeturaj Pandey, Rongmei Chen, Asen Asenov, Aida Todri-Sanial. IEEE Transactions on Nanotechnology.USA 2018. 

  17. “A Survey of Carbon Nanotube Interconnects for Energy Efficient Integrated Circuits”. Aida Todri-Sanial, Raphael Ramos, Hanako Okuno, Jean Dijon, Abitha Dhavamani, Marcus Widlicenus, Katharina Lilienthal, Benjamin Uhlig, Toufik Sadi, Vihar Georgiev, Asen Asenov, Salvatore Amoroso, Andrew Pender, Andrew Brown, Campbell Millar, Fabian Motzfeld, Bernd Gotsmann, Jie Liang, Goncalo Goncalves, Nalin Rupesinghe, Ken Teo. IEEE Circuits and Systems Magazine. USA 2017. 

  18. “Challenges and Progress on Carbon Nanotube Integration for BEOL Interconnects”. B. Uhlig, A. Dhavamani, N. Nagy, K. Lilienthal, R. Liske, R. Ramos, J. Dijon, H. Okuno, D. Kalita, J. Lee, V. Georgiev, A. Asenov, S. Amoroso, L. Wang, F. Koenemann, B. Gotsmann, G. Goncalves, B. Chen, J. Liang, R. R. Pandey, R. Chen, A. Todri-Sanial. 2018 IEEE International Interconnect Technology Conference (IITC). IITC, Santa Clara, CA USA. 2018. 

  19. “A physics-based investigation of Pt-salt doped carbon nanotubes for local interconnects”. J. Liang, R. Ramos, J. Dijon, H. Okuno, D. Kalita, D. Renaud, J. Lee, V. P. Georgiev, S. Berrada, T. Sadi, A. Asenov, B. Uhlig, K. Lilienthal, A. Dhavamani, F. Konemann, B. Gotsmann, G. Goncalves, B. Chen, K. Teo, R. R. Pandey, A. Todri-Sanial. 2017 IEEE International Electron Devices Meeting (IEDM). IEDM, San Francisco, CA, USA.

  20. “Atomistic to circuit level modeling of defective doped SWCNTs with contacts for on-chip interconnect application”. J. Liang, J. Lee, S. Berrada, V. Georgiev, A. Asenov, N. Azemard-Crestani, A. Todri-Sanial. 2017 IEEE 12th Nanotechnology Materials and Devices Conference (NMDC). NMDC 2017, Singapore. 2017. 

  21. “Atoms-to-circuits simulation investigation of CNT interconnects for next generation CMOS technology”. Jaehyun Lee, Jie Liang, Salvatore M. Amoroso, Toufik Sadi, Liping Wang, Flamen Asenov, Andrew Pender, Dave T. Reid, Vihar P. Georgiev, Campbell Millar, Aida Todri-Sanial, Asen Asenov. 2017 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD). SISPAD 2017, Kamakura, Japan. http://eprints.gla.ac.uk/147286/

  22. “Progress on Carbon Nanotube BEOL Interconnects.” Uhlig, B., Liang, J., Lee, J., Ramos, R., Dhavamani, A., Nagy, N., Dijon, J., Okuno, H., Kalita, D., Georgiev, V., Asenov, A., Amoroso, S., Wang, L., Millar, C., Konemann, F., Gotsmann, B., Goncalves, G., Chen, B., Pandey, R. R., Chen, R., and Todri-Sanial, A. 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), Dresden, Germany, 19-23 Mar 2018.

  23. “Nanoscale Scanning Probe Thermometry”. Fabian Konemann, Morten Vollmann, Fabian Menges, I-Ju Chen, Norizzawati Mohd Ghazali, Tomohiro Yamaguchi, Koji Ishibashi, Claes Thelander, Bernd Gotsmann. 2018 24rd International Workshop on Thermal Investigations of ICs and Systems (THERMINIC). 

  24. “Nanoscale Thermometry by Scanning Microscopy”. Fabian Konemann, Morten Vollmann, Fabian Menges, Bernd Gotsmann. THERMINIC 2018 - 24th International Worskhop – Stockholm.

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Background Partners Publications

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  1. B. Uhlig, “High precision stress measurements in semiconductor structures by raman microscopy”, Dissertation TU Dresden (2010)

  2. B. Uhlig, R. Liske and L. Gerlich, „The Bigger Picture: Fraunhofer CNT´s BEOL Applied Research”, Future Fab Intl. 42 (2012) 89‐93

  3. K. Lilienthal, „Nanostrukturierte SiO2‐Gläser für die Mikrotechnik und Biosensorik“, Dissertation TU Ilmenau (2014)

  4. M. Wislicenus et al., “Cobalt advanced barrier metallization: A resistivity composition analysis”, Microelectronic Engineering (2014) 

  5. N. Chiodarelli, A. Fournier, and J. Dijon” Impact of the contact's geometry on the line resistivity of carbon nanotubes bundles for applications as horizontal interconnects” Applied Physics Letters 103, 053115 (2013)

  6. N. Chiodarelli, A Fournier, H. Okuno, J. Dijon “Carbon Nanotubes horizontal interconnects with end bounded contacts, diameters down to 50nm and length up to 20μm” Carbon 60 (2013) 139‐145

  7. J Dijon et al, ”Ultra‐high density Carbon Nanotubes on Al‐Cu for advanced Vias” IEDM (2010) 761‐763

  8. H. Guerin, H. Le Poche et al., “High‐yield, in‐situ fabrication and integration of horizontal carbon nanotube arrays at the wafer scale for robust ammonia sensors” carbon 78 (2014) 326 –338

  9. Y. Le Tiec et al., Chemistry in Microelectronics, Wiley Online Library, 2013 

  10. A. Todri, M. Marek‐Sadowska, “Reliability Analysis and Optimization for Power Gated ICs with Multiple Power Gating Configurations,” IEEE Transactions on Very Large Scale Integration Systems, vol.19, no.3, pp.457‐468, 2011.

  11. A. Todri, M. Marek‐Sadowska, “Power Delivery for Multi‐Core Systems,” IEEE Transactions on Very Large Scale Integration Systems vol.19, no.12, pp.2243‐2255, 2011.  

  12. A. Todri, S. Kundu, P. Girard, A. Bosio, L. Dilillo, A. Virazel, “ A Study of Tapered 3D TSVs for Power and Thermal Integrity,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.21, no.2, pp.306 ‐ 319, 2013.

  13. A. Todri‐Sanial, S. Kundu, P. Girard, A. Bosio, L. Dillilo, A. Virazel, "Globally Constrained Locally Optimized 3‐D Power Delivery Networks," IEEE Very Large Scale Integration (VLSI) Systems.

  14.  Y. Cheng, A. Todri‐Sanial, A. Bosio, L.; Dilillo, P. Girard, A. Virazel, P. Vivet, M. Belleville, "A novel method to mitigate TSV electromigration for 3D ICs,” IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp.121‐126, 2013.

  15. A. Todri‐Sanial, “Thermal Characterization of Through‐Silicon Vias,” IEEE International Conference on Thermal, Mechanical and Multi‐Physics Simulation and Experiments in Microelectronics and Microsystems (Eurosime), 2014.

  16. A. Todri‐Sanial, “Investigation of Horizontally Aligned Carbon Nanotubes for Efficient Power Delivery in 3D ICs,” IEEE Signal and Power Integrity (SPI), 2014.

  17. A. Todri‐Sanial, Chuan Seng Tan, “Physical Design for Three‐Dimensional Integrated Circuits,” book by CRC Press, Nov. 2015, ISBN: 978‐1‐49‐871036‐7 

  18. S.K. Youn, C.E. Frouzakis, B.P. Gopi, J. Robertson, K.B.K. Teo, H.G. Park. “Temperature Gradient Chemical Vapor Deposition of Vertically Aligned Carbon Nanotubes”, Carbon 54, 343 (2013).

  19. X. Wang, Y. Zhang, M.S. Haque, K.B.K. Teo, M. Mann, H.E. Unalan, P.A. Warburton, F. Udrea, W.I. Milne. “Deposition of Carbon Nanotubes on CMOS”, IEEE Transactions in Nanotechnology 11, 215 (2012) 

  20. F. Menges, H. Riel, A. Stemmer, B. Gotsmann, “Quantitative Thermometry of Nanoscale Hot Spots”’ Nano Letters 12(2), 596‐601, 2012

  21. S F Karg, V Troncale, U Drechsler, P Mensch, P Das Kanungo, H Schmid, V Schmidt, L Gignac, H Riel and B Gotsmann, ”Full thermoelectric characterization of InAs nanowires using MEMS heater/sensors”, Nanotechnology 25(30), 305702, IOP Publishing, 2014

  22. F. Menges, H. Riel, A. Stemmer, C. Dimitrakopoulos, and B. Gotsmann, “Thermal Transport into Graphene through Nanoscopic Contacts”, Physical Review Letters 111, 205901, 2013

  23. E. Lörtscher, D. Widmer, B. Gotsmann, “Next‐Generation Nanotechnology Laboratories with Simultaneous Reduction of all Relevant Disturbances”, Nanoscale pp. 5, 10542‐10549, 2013

  24. B. Gotsmann, M. A. Lantz, “Quantized thermal transport across contacts of rough surfaces”, Nature Materials12, 59‐ 65, 2013 

  25. A. Asenov, B. Cheng, F. Adamu‐Lema, L. Shifren, S. Sinha, C. Riddet, C. L. Alexander, A. R. Brown, X. Wang and S. M. Amoroso, "Predictive Simulation of Future CMOS Technologies and Their Impact on Circuits," in Proc. IEEE 12th International Conference on Solid‐State and Integrated Circuit Technology (ICSICT), Guilin China, Oct. 28‐31, 2014, pp. 1411–1414.

  26. S. M. Amoroso, V. P. Georgiev, L. Gerrer, E. Towie, X. Wang, C. Riddet, A. R. Brown, A. Asenov, "Inverse Scaling Trends for Charge‐Trapping‐Induced Degradation of FinFETs Performance", IEEE Transactions on Electron Devices, 2014.

  27. L. Shifren, R. Aitken, A. R. Brown, V. Chandra, B. Cheng, C. Riddet, A. Asenov, "Predictive Simulation and Benchmarking of Si and Ge pMOS FinFETs for Future CMOS Technology," IEEE Transactions on Electron Devices, vol. 61 no. 5, pp. 2271‐2277, 2014.

  28. S. M. Amoroso, L. Gerrer, M. Nedjalkov, R. Hussin, C. Alexander, and A. Asenov, "Modeling Carrier Mobility in Nano‐ MOSFETs in the Presence of Discrete Trapped Charges: Accuracy and Issues," IEEE Transactions on Electron Devices, vol. 61 no. 5, pp. 1292‐1298, 2014.

  29. F. Adamu‐Lema, S. M. Amoroso, X. Wang, B. Cheng, L. Shifren, R. Aitken, S. Sinha, G. Yeric and A. Asenov, "The Discrepancy Between the Uniform and Variability Aware Atomistic TCAD Simulations of Decananometer Bulk MOSFETs and FinFETs," in Proc. 19th International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Yokohama Japan, Sept. 8‐11, 2014, pp. 285–288.

  30. S. M. Amoroso, V. P. Georgiev, E. Towie, C. Riddet and A. Asenov, "Metamorphosis of a nano wire: A 3‐D coupled mode space NEGF study," Computational Electronics (IWCE), 2014 International Workshop on: June 2014.

  31. A. Asenov, F. Adamu‐Lema, X. Wang and S. M. Amoroso, "Problems with the continuous doping TCAD simulations of decananometer CMOS transistors," IEEE Transactions on Electron Devices, Vol. 61, No. 8, pp. 2745–2751, Aug. 2014.

  32. A. Asenov, “Random dopant induced threshold voltage lowering and fluctuations in sub 0.1 micron MOSFETs: A 3D ‘atomistic’ simulation study”, IEEE Trans. Electron Dev., vol. 45, No. 12 pp 2505‐2513 (1998).

  33. A. Asenov, A. R. Brown J. H. Davies, S. Kaya, and G. Slavcheva, “Simulation of Intrinsic Parameter Fluctuations in Decananometre and Nanometre scale MOSFETs”, IEEE Trans. Electron Dev. vol. 50, pp. 1837‐1852 (2003).

  34. A. Asenov, S. Kaya and A. R. Brown, “Intrinsic Parameter Fluctuations in Decananometre MOSFETs Introduced by Gate Line Edge Roughness”, IEEE Trans. Electron Dev., vol. 50, pp. 1254‐1260 (2003) G. Roy, A. R. Brown, F. Adamu‐Lema, S. Roy and A. Asenov, “Simulation Study of Individual and Combined Sources of Intrinsic Parameter Fluctuations in Conventional Nano‐MOSFETs”, IEEE Trans Electron Dev. vol. 53, pp. 3063‐3070 (2006)

  35. A. Asenov, R. Balasubramaniam, A.R. Brown and J.H. Davies, “RTS amplitudes in decananometer MOSFETs: A 3D simulation study”, IEEE Trans. Electron Dev., vol. 50, pp. 839‐845 (2003).

  36. A. Asenov, G. Slavcheva, A.R. Brown, J.H. Davies and S. Saini, “Increase in the random dopant induced threshold fluctuations and lowering in sub‐100 nm MOSFETs due to quantum effects: A 3‐D density‐gradient simulation study”, IEEE Trans. Electron Dev., vol. 48, pp. 722‐729 ( 2001).

  37. A. Asenov, S. Kaya, J. H. Davies, “Intrinsic Threshold Voltage Fluctuations in Decanano MOSFETs due to Local Oxide Thickness Variations”, IEEE Trans. Electron Dev., vol. 49, pp. 112‐119 ( 2002).

  38. C. Alexander, G. Roy, A. Asenov, “Random‐Dopant‐Induced Drain Current Variationin Nano‐MOSFETs: A three dimensional self‐consistent Monte Carlo study using ‘ab‐initio’ ionized impurity scattering”, IEEE Trans. Electron. Dev., vol. 55, 3251 (2008).

  39. A. Martinez, N. Seoane, A. R. Brown, J. R. Barker, A. Asenov, “3‐D Nonequilibrium Green's Function Simulation of Nonperturbative Scattering From Discrete Dopants in the Source and Drain of a Silicon Nanowire Transistor”, IEEE Trans. Nanotechnology, vol. 8, 603 (2009)

  40. T. Sadi, R.W. Kelsall and N. J. Pilgrim, “Investigation of Self‐Heating Effects in Submicrometer GaN/AlGaN HEMTs Using an Electrothermal Monte Carlo Method”. IEEE Transactions on Electron Devices, vol. 53, pp. 2892‐2900 (2006).

  41. T. Sadi, R.W. Kelsall and N. J. Pilgrim, “Electrothermal Monte Carlo Simulation of Submicrometer Si/SiGe MODFETs. IEEE Transactions on Electron Devices, vol. 54, pp. 332‐339 (2007).

  42. T. Sadi, J.‐L. Thobel and F. Dessenne, “Self‐Consistent Electrothermal Monte Carlo Simulation of Single InAs Nanowire Channel MISFETs”. Journal of Applied Physics, vol. 108, pp. 084506‐1‐7 (2010).

  43. T. Sadi, P. Kivisaari, J. Oksanen, J. Tulkki, “On the correlation of the Auger generated hot electron emission and efficiency droop in III‐N LEDs”, Applied Physics Letters, vol. 105, pp. 091106‐1‐5 (2014). 

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